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Optic Module Solution

Optic Module Solution

2025-02-18
SiTime
관리자

SiTime MEMS Timing Benefits

Complete MEMS XO portfolio

70 fs and 200 fs jitter grades

2016, 2520, 3225 packages

LVPECL, LVDS, HCSL, Low-power HCSL, FlexSwing™

Most robust in real world conditions

Immunity to supply noise

105°C, resistant to heat

No activity or frequency jumps

Integrated MEMS, easy to use

50% smaller

On-chip LDO reducing BOM

No quartz reliability issues

Smallest package and integrated resistors –50% less area

Smallest package and integrated resistors – 50% less area

FlexSwing™ delivers 30% power savings vs. LVPECL, enables chipset flexibility

FlexSwing™ delivers 30% power savings vs. LVPECL, enables chipset flexibility

Ultra-low jitter offering down to 70 fsec

Devices	Jitter Grade	Function	Key Features
Differential XO SiT9501 25 to 644.53125 MHz	70 fsec	Reference clock for high-speed PHYs	14 standard frequencies, 105°C, 2016/2520/3225 pkgs.
Differential XO SiT9375 25 to 644.53125 MHz	200 fsec	Reference clock for high-speed PHYs	31 standard frequencies, 105°C, 2016/2520/3225 pkgs.
Differential XO SiT9365 SiT9366 SiT9367	230 fsec	Reference clock for high-speed PHYs	1 to 725 MHz, 105°C, 3225/5032/7050 pkgs.

MEMS Timing Outperforms Quartz

Ultra-Low Phase Noise, 156.25 MHz	Ultra-Low Phase Noise, 644.53125 MHz
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Excellent Stability	Better PSNR (Power Supply Noise Rejection)
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Higher Reliability	Smallest Packages
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